KIMMEL GERKE BULLETS

Volume 2, Number 1 (Fall, 1990)

Welcome to KGB...

And to the EMC Event issue of our "personal communications" to our friends and clients. We begin our second year of KGB with this issue. What started out as an experiment has proved to be a useful and effective tool for keeping in touch, and for passing along information on how to identify, prevent, and fix EMC problems. Thanks to all of your who have complimented us and encouraged us.

This issue focuses on high performance digital design and the special EMC problems associated with these systems. As clock speeds increase, so do the emissions, which results in external problems (FCC, VDE failures) and internal problems (crosstalk, ringing, self-jamming). At the same time, high speed systems become more vulnerable to other external influences like electrostatic discharge or nearby radio transmitters. The bottom line...increased EMI problems. Hope our focus article gives you some helpful ideas.

We hope to see you at the Fifth Annual Minnesota EMC Event. We're excited about this year's show...lots of new products, new information, and new technical talks. We're proud to be again co-sponsoring this show with Amador. Stop by our booth and say hello. And give us a call if we can help you with your EMI problems.

Best Regards,

Daryl Gerke, PE, and Bill Kimmel, PE

===

Attend the EMC Event

What: Fifth Annual Minnesota EMC Event

When: Thursday, October 25, 9 A.M. - 5 P.M.

Where: Thunderbird Hotel, Bloomington, MN

Cost: Free, if pre-registered - $25 at door (Call 612-465-3911 to register)

Over 20 vendors and over 20 technical talks. Come and learn how to solve your EMC problems.

===

Shows and Conferences

Here are some shows in which we'll be participating. Give us a call if you'd like more information on any of these events.

EMC Expo 1990...An international conference sponsored by EMC Technology Magazine, held October 17-19 in "Silicon Valley" at the San Mateo County Expo Center. Daryl and Bill will present a tutorial session titled "Twenty Common EMI Mistakes...and How to Avoid Them" on October 17.

Fifth Annual Minnesota EMC Event...The local (Twin Cities) EMC show of the year, co-sponsored by Amador and Kimmel Gerke Associates, held Thursday, October 25, at the Thunderbird Hotel in Bloomington, MN. Bill will be doing a new version of his popular talk on "EMI Design Tips", and Daryl (and Paul Cook of Amador) will present the paper "60 MHz Magnetic Field Susceptibility Tests of CRT Displays" originally given at the IEEE EMC show in Washington, D.C.

Midwest Expo 1991...The largest electronics show in Minnesota, aimed at the general technical community. Held May 21-23 at the Minneapolis Convention Center. Once again, we'll be both exhibiting and also again supporting the IEEE sponsored technical sessions. Watch this space for more details.

===

Report on the International IEEE EMC Symposium...

We attended this international show in August in Washington, D.C. Believe it or not, we have three cool days, and returned to a hot and muggy Minnesota. There were several good papers on printed circuit board and chip emissions. The winning paper (presented by Robert German, Henry Ott, and Clayton Paul) was particularly good - "Effects of an Image Plane on Printed Circuit Board Radiation."

Daryl's paper (co-authored with Paul Cook of Amador) on 60 Hz magnetic field effects on CRTs created quite a bit of interest as well. We've had quite a few requests for reprints...call us if you'd like a copy. We feel this problem is only going to increase, particularly with new higher performance CRTs.

Lot's of talk about the 1992 European Community EMC requirements. Remember, after January 1, 1992, products sold to the EC must pass ESD and RF field susceptibility tests in addition to the present emissions tests. If you're designing products for Europe, now is the time to address these issues!

===

Focus on High Performance Digital Design...

This issue focuses on high speed digital circuit design. Modern electronics is reaching for ever faster designs, and with it, interference problems. Those designers who employ simple EMI control techniques rarely get into serious trouble. At design time, many of these techniques are free, and at most are inexpensive.

Before starting your design, you need to decide what is driving your market. Is it low cost or is it performance? We generally divide digital designs into three broad categories: (1) high performance design, where all the good design tricks and techniques are needed just to get it working; (2) microcontroller designs where cost is a major driving factor; and (3) garden variety projects.

A very key point is that high speed circuitry is the enemy of electromagnetic compatibility. Thus, if you must have high speed design, you must be prepared to pay a price. That price usually means multilayer circuit boards, filtering, and often shielding. If you have high speed data lines which must leave the board, then extra attention is needed, particularly if the signals (such as high speed video or data) are carried by external cables.

Tradeoffs, of course, can be made. (Aren't tradeoffs the essence of engineering?) Is your product high volume? If so, are you willing to spend more engineering time working for a low cost solution? Is your product low volume? If so, the additional engineering costs involved in reducing the parts cost may never be recovered.

Is your time-to-market critical? If so, you should design conservatively. If you fail to meet your EMI design goals, you will be busy redesigning while your competitors are selling. And if your schedule is really tight, should you start building production units before you have qualified your design? That is always a risk. The key is to control those risks -- we have seen thousands of dollars of scrap generated by not following conservative EMI practices.

Designing for High Performance

High performance design starts with self compatibility. First, you need to keep from shooting yourself in the foot. Then you need to ensure you don't shoot your neighbor in the foot, or let him shoot you in the foot.

In every design, we look at S-P-V: Source-Path-Victim. If you are designing the board, you may have no control over the external environment, but you can control the S-P-V on board. With careful planning, you can limit the spread of interference from your noisy circuits; you can protect your sensitive circuits from interference; and you can even intercept interference along the path.

We find that prudent design treats all three. Careful component placement and trace layout minimizes the coupling paths. Selective decoupling and filtering your noise generators and sensitive circuits completes the design. Let's take a closer look at these.

Digital Circuits as Noise Generators

On-board, your principle noise generators are the periodic signals, such as clock and clock drivers, address latches, and read/write controls. Lines carrying these signals should be scrupulously segregated. Power and ground to these circuits should also be isolated with decoupling -- remember, noise travels down the power and ground lines as easily as signal lines.

Be sure to keep the lead lengths on decoupling capacitors as short as possible. You can increase power and ground isolation by using a multihole ferrite in series with both power and ground connections to this area -- we call this the "micro island" approach.

Use an output filter on any high speed data lines leaving the "micro island". High speed output circuits, especially HCT, have transition edges rich in harmonic energy. These should be damped by using a small series resistor (15 to 30 ohms) or a small ferrite. In many cases, this is enough filtering, but sometimes a small shunt capacitor after the resistor or ferrite is needed. Do not put the capacitor directly across the output driver. Make sure these signals have an adequate ground return path immediately adjacent to the signal paths.

Bus drivers are also vulnerable to "ground bounce", which occurs when all but one signal switches at one time. The unswitched circuit shares ground, and consequently ground noise, with the common circuits. The series resistor mentioned above will often mitigate this problem.

Digital Circuits as Sensitive Receivers

The most sensitive digital receivers are the edge triggered devices, otherwise known as "glitch detectors" or "glitch stretchers". In particular, you need to keep the clock input line to these chips clean, or you'll end up sampling at unexpected times. To keep the clock trace clean, avoid long parallel runs with any signal line, and especially avoid potentially noisy I/O traces. Any edge triggered device that processes signals from off-board needs extra care.

Coupling paths

Most coupling paths are on the printed circuit board, and most of the time, multi-layer boards are much more forgiving. (Multilayer boards are typically 20 dB quieter and 20 dB less susceptible than double sided boards.)

We generally use clock speeds to determine the technology needed. Below 5 MHz, double layer boards work quite well. At speeds above 10 MHz, multi-layer boards are often needed, although one can push this to about 20 MHz with very careful layout and design. At speeds above 50 MHz, transmission line (or constant impedance) designs are required, with terminations for all but the shortest traces.

Many designers use double sided boards for cost reasons. Although we generally prefer multi-layer boards for EMI control, with careful design techniques you can avoid many of the more common problems. Here are some recommendations for your next high speed two layer design:

(1) All IC's powered by a Vcc/return pair of traces, with decoupling capacitors immediately at the point where the pair separate to feed the chip.

(2) Avoid long parallel traces. All critical signal lines must have ground return running parallel to the signal lines. This includes clock distribution, data buses, and edge triggered clock lines. Long runs, if needed, should also be guarded with a dedicated ground trace on each side of the critical traces.

(3) Signal filtering is much more critical than with multilayer boards. Output buses can gang up to generate lots of noise, and inputs often have less margin.

Summary

Although brief, we hope this overview gave you some insights and ideas for EMI control in your next digital design project. Give us a call if you have comments, or would like more information.

===

A KGB Bullet...

Here's one for crosstalk we saw in the September 1990 issue of EMC Technology Magazine. In his article titled "Design Considerations to Minimize Common Mode Noise in Microprocessors", Robert Jones states...

"A useful rule to thumb is to allow a minimum of 1/8 inch between any port foil and logic foil for each 1 inch of joint parallel travel, with the distance never less than 1/16 inch."

Have you got a "Bullet" you find useful? We'd be happy to publish it, and give you the credit as well.

===

Magnetic Field Tidbits...

We just purchased a new Holaday Magnetic Field survey meter, so if you have problems or concerns about low frequency magnetic fields, give us a call. We see an increasing number of problems with CRT failures due to 60 Hz fields.

We've also located two sources of magnetic field shields for CRTs. The first is Amuneal Corporation in Philadelphia (215-535-3000) and the second is DLS Electronic Systems in Chicago (708-699-9060). Both companies offer external shields fabricated of high permeability metals. DLS offers "decorator models" in oak, and Amuneal offers units painted to match your computer.

===

Book Review

Since this issue focuses on high performance design, here is a book we like on the subject...CMOS/TTL Digital Systems Design, by James Buchanan. Published by McGraw Hill, 1990.

This book covers the parasitics surrounding modern digital integrated circuits, including signal glitches, timing skew, and parasitic capacitance and inductance. It makes these issues easy to understand, and explains why logic designs that work on paper often fail in practice. We think this book belongs in every logic designer's library. Our only complaint -- no information on ECL or GaAs, but maybe that will be in a future issue.

===

A KGB Bullet...

Wiring lengths which exceed one-half the rise time are likely to cause ringing on the line and other signal degradation. To avoid this problem, keep on-board trace or cable lengths less than the following:

Circuit type Risetime (nsec) Maximum length (assumes 2 nsec/ft)

GaAs 0.1 0.6 inches

ECL 0.75 5 inches

F,S,AS 3 1.5 feet

AC 4 2 feet

ALS 6 3 feet

LS 8 4 feet

TTL 10 5 feet

===

Certified EMC Engineers

We are pleased to announce that both Bill and Daryl are now certified by NARTE (National Association of Telecommunications Engineers) as Certified Electromagnetic Computability Engineers. This program was established by the U.S. Navy to assure that "EMC engineers" had adequate knowledge, proficiency, experience with EMI and EMC issues.

===

About Kimmel Gerke Associates, Ltd.

We're a professional engineering consulting firm that specializes in ELECTROMAGNETIC COMPATIBILITY, a broad area of electrical engineering that deals with electronic interference, or noise. We share almost fifty years of experience in the electronics industry. We're both degreed Electrical Engineers, and we are both Registered Professional Engineers.

We both have experience with the design, applications, and installation of electronic systems subject to government EMC (FCC, VDE, MIL-STD-461) and TEMPEST requirements. We both have experience solving operational EMC problems with a wide range of equipment. We'd be glad to help you with your EMC problems, fixes, design or training needs.

===

Courses Available

If you'd like instruction on how to design and/or install your equipment for EMI compliance (FCC/VDE) or immunity (ESD, power, RF, etc) we can help with one, two, three, or four day classes. Available either "off the shelf" or "custom designed."

If you need to train five or more people, an in-plant course can probably save you money. And since the class is taught by an experienced EMI consultant and instructor, you can get practical up-to-date knowledge, not a lot of theory. Call us at 612-330-3728 for details and pricing.